#ifndef __CSP_DMAC_H__
#define __CSP_DMAC_H__


//#include "AC33Mx128.h"

typedef struct {

	CSP_REGISTER_T		DCnCR;				// offset = 0x0000, R/W 
	CSP_REGISTER_T		DCnSR;				// offset = 0x0004, R/W 
	CSP_REGISTER_T		DCnPAR;				// offset = 0x0008, RO
	CSP_REGISTER_T		DCnMAR;				// offset = 0x000C, R/W 

} CSP_DMAC_T;



//==========================================================================
// 	DCnCR
// 
//				@ DC0CR  = 0x4000_0400
//				@ DC1CR  = 0x4000_0410
//				@ DC2CR  = 0x4000_0420
//				@ DC3CR  = 0x4000_0430
// 
//				@ DC4CR  = 0x4000_0440
//				@ DC5CR  = 0x4000_0450
//				@ DC6CR  = 0x4000_0460
//				@ DC7CR  = 0x4000_0470
//
//				@ DC8CR  = 0x4000_0480
//				@ DC9CR  = 0x4000_0490
//				@ DC10CR = 0x4000_04A0
//				@ DC11CR = 0x4000_04B0
//
//				@ DC12CR = 0x4000_04C0
//				@ DC13CR = 0x4000_04D0
//				@ DC14CR = 0x4000_04E0
//
//==========================================================================
#define DCnCR_TRANSCNT_VAL(n)					(((n)&0x0FFF)<<16)
#define DCnCR_TRANSCNT_MASK						(0x0FFF<<16)

#define DCnCR_SIZE_BYTE 						(0x0000<<2)
#define DCnCR_SIZE_HALF_WORD					(0x0001<<2)
#define DCnCR_SIZE_WORD							(0x0002<<2)
#define DCnCR_SIZE_MASK							(0x0003<<2)

#define DCnCR_DIR								(0x0001<<1)
#define DCnCR_DIR_MEM_TO_PERI					(0x0000<<1)
#define DCnCR_DIR_PERI_TO_MEM					(0x0001<<1)




//==========================================================================
// 	DCnSR
//		
//				@ DC0SR  = 0x4000_0404
//				@ DC1SR  = 0x4000_0414
//				@ DC2SR  = 0x4000_0424
//				@ DC3SR  = 0x4000_0434
//
//				@ DC4SR  = 0x4000_0444
//				@ DC5SR  = 0x4000_0454
//				@ DC6SR  = 0x4000_0464
//				@ DC7SR  = 0x4000_0474
//
//				@ DC8SR  = 0x4000_0484
//				@ DC9SR  = 0x4000_0494
//				@ DC10SR = 0x4000_04A4
//				@ DC11SR = 0x4000_04B4
//
//				@ DC12SR = 0x4000_04C4
//				@ DC13SR = 0x4000_04D4
//				@ DC14SR = 0x4000_04E4
//
//==========================================================================
#define DCnSR_EOT								(0x0001<<7)
#define DCnSR_DMAEN								(0x0001<<0)




//==========================================================================
// 	DCnPAR
//
//				@ DC0PAR  = 0x4000_0408		UART0_RBR
//				@ DC1PAR  = 0x4000_0418		UART0_THR
//				@ DC2PAR  = 0x4000_0428		UART1_RBR
//				@ DC3PAR  = 0x4000_0438		UART1_THR
//
//				@ DC4PAR  = 0x4000_0448		UART2_RBR
//				@ DC5PAR  = 0x4000_0458		UART2_THR
//				@ DC6PAR  = 0x4000_0468		UART3_RBR
//				@ DC7PAR  = 0x4000_0478		UART3_THR
//
//				@ DC8PAR  = 0x4000_0448		SPI0_RDR
//				@ DC9PAR  = 0x4000_0458		SPI0_TDR
//				@ DC10PAR = 0x4000_0468		SPI1_RDR
//				@ DC11PAR = 0x4000_0478		SPI1_TDR
//
//				@ DC12PAR = 0x4000_0448		ADC0DR
//				@ DC13PAR = 0x4000_0458		ADC1DR
//				@ DC14PAR = 0x4000_0468		ADC2DR
//
//==========================================================================



//==========================================================================
// 	DCnMAR
//
//				@ DC0MAR  = 0x4000_040C
//				@ DC1MAR  = 0x4000_041C
//				@ DC2MAR  = 0x4000_042C
//				@ DC3MAR  = 0x4000_043C
//
//				@ DC4MAR  = 0x4000_044C
//				@ DC5MAR  = 0x4000_045C
//				@ DC6MAR  = 0x4000_046C
//				@ DC7MAR  = 0x4000_047C
//
//				@ DC8MAR  = 0x4000_048C
//				@ DC9MAR  = 0x4000_049C
//				@ DC10MAR = 0x4000_04AC
//				@ DC11MAR = 0x4000_04BC
//
//				@ DC12MAR = 0x4000_04CC
//				@ DC13MAR = 0x4000_04DC
//				@ DC14MAR = 0x4000_04EC
//
//==========================================================================



//==========================================================================
// 
//		M A C R O S
//
//==========================================================================
#define CSP_DMAC_GET_DCnCR(dmac)					((dmac)->DCnCR)
#define CSP_DMAC_SET_DCnCR(dmac, val)				((dmac)->DCnCR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_DMAC_GET_DCnSR(dmac)					((dmac)->DCnSR)
#define CSP_DMAC_SET_DCnSR(dmac, val)				((dmac)->DCnSR = (val))
//-----------------------------------------------------------------------------------------
#define CSP_DMAC_GET_DCnPAR(dmac)					((dmac)->DCnPAR)
//-----------------------------------------------------------------------------------------
#define CSP_DMAC_GET_DCnMAR(dmac)					((dmac)->DCnMAR)
#define CSP_DMAC_SET_DCnMAR(dmac, val)				((dmac)->DCnMAR = (val))
//-----------------------------------------------------------------------------------------



// DMAC
extern CSP_DMAC_T			* const 		DMAC0; 
extern CSP_DMAC_T			* const 		DMAC1; 
extern CSP_DMAC_T			* const 		DMAC2; 
extern CSP_DMAC_T			* const 		DMAC3; 
extern CSP_DMAC_T			* const 		DMAC4; 
extern CSP_DMAC_T			* const 		DMAC5; 
extern CSP_DMAC_T			* const 		DMAC6; 
extern CSP_DMAC_T			* const 		DMAC7; 
extern CSP_DMAC_T			* const 		DMAC8; 
extern CSP_DMAC_T			* const 		DMAC9; 
extern CSP_DMAC_T			* const 		DMAC10; 
extern CSP_DMAC_T			* const 		DMAC11; 
extern CSP_DMAC_T			* const 		DMAC12; 
extern CSP_DMAC_T			* const 		DMAC13; 
extern CSP_DMAC_T			* const 		DMAC14; 



//==========================================================================
// 
//		F U N C T I O N    D E C L A R A T I O N S 
//
//==========================================================================


#endif 

